And another Harddisk Controller for PDP-11/Hack
Why another harddisk controller for the PDP‑11/Hack
In one of the posts on the following thread at VCFED Al Kosov posted the source code of the RQDX3 controller. Having always planned to build a MSCP compatible controller form my PDP‑11/Hack it was obvious that I had a closer look to the program sources. Nearly at the same time I was also getting familiar with the new AVR128DA and AVR128DB microcontrollers from Microchip and in one of the discussions at the Mikrocontroller forum I was visiting for the purpose of getting a better understanding of this family someone started a thread about a realtime operating system for AVR microcontrollers.
Interstingly enough the RQDX3 was built around a minimalistic real-time scheduler and I always thought it would be nice to have a RT-OS or Scheduler for the AVR microcontroller. Therefore I “translated” the T-11 source code of the real-time scheduler of the RQDX3 source into a scheduler for the AVR microcontrollers with more or less the same features. Looking further into the RQDX3 source code I decided to build the logic of my MSCP controller similar to this.
The first was a proof of concept that was running on the ATmega1248P processor but very soon it was clear, that I needed something with hierarchical interrupts when I was going to continue to use an interrupt service routine to respond to Q-Bus requests. The AVR128 family is based on the Xmega architecture that indeed has one high priority interrupt. This single high priority interrupt was sufficient to respond to the Q-Bus requests. The scheduler itself was implemented as a low priority software interrupt. At the end the only part where I needed to completely disable interrupts was now limited places where normal and interrupt routines updated the same pointers.
Therefore I started to build the new harddisk controller for my PDP‑11/Hack. But first I ported the RLV12 Emulation to the new hardware to make sure the concept is working.
Schematic
As usual there is the bus interface and the CPLD
This time I added a USB to Serial converter, FT230X, to the device so I could just plug in the USB cable to connect to the CLI. This chip can be programmed and given your own serial number. This is very handy with macOS as it appears as serial device with the serial number in it. Then there is the microcontroller, a 3V3 LDO, and the SD-Card cage
Board
The board uses the short Euro-Card (10 x 10 cm) to keep production costs low and requires no complex routing. To minimize the number of vias I arranged the PIN of the CPLD to reflect straight connections if possible.
Here is a foto of the built version with some additional debugging wires that were required to debug the microcontroller and CPLD firmware.
