The KDJ11-E was the most recent CPU board from DEC and was introduced in 1990. This was a quad-width CPU board that was used in systems with either a H9278-A backplane or in the PDP-11/94 with an extended backplane that added UNIBUS slots. This CPU module added quite some features
- The memory was as fast as a DJC11 chip could read from cache, therefore the KDJ11-E did not have any cache memory, the module was available with either 2Mbyte or 4Mbyte on-board RAM
- There were a total of 8 serial lines
- It added the DS1215N real-time clock chip which was also known as phantom clock chip as it had some unique features that could be used to add this clock-chip in parallel to an existing ROM. It was often used in early personal computers as an add-on for so called no-slot clocks
- EEPROM to hold settings
- Extended startup ROM
DS1215 RTCMy PDP-11/Hack used the same trick for the memory to get the best performance from a DCJ11 and later I thought it would be cool to have a real-time clock so I would not have to enter time and date every time I boot a OS. Actually when I planned to add a RTC chip to my system I was only aware that the KDJ11-E had such a real-time clock. I did not know that it was a DS1215. But soon I found the TOY program from Oleg which was able to read the RTC from a PDP-11/93. First I was puzzled about the code but then I got aware that the RTC had to be one of the so called phantom clock chips. Soon I found the DS1215 which required exactly the same sequence as Oleg's program was using to activate the read of the clock registers. Only later I found pictures of KDJ11-E modules with enough resolution where I could clearly identify that the KDJ11-E had indeed a DS1215
This was at a time I was designing the new multi-function board for my PDP-11/Hack. A short view into the KDJ11-E CPU Module User’s Guide showed exactly how this had to be implemented, in fact it only requires that the data input and output pins of the DS1215 phantom clock switch were made available to bit 8 of the so called additional status register at address 17777526(8). As I had some spare pins and resources, in the CPLD used on the new multi-function board, I added a DS1215 and the logic to make the input/output available in a minimal additional status register.
Later I added an option to Oleg’s TOY program to allow programming the phantom chip. See separate posts in the projects section TOY.
I used this program in a modified default RSX startup command file to provide a default string for the time and date which is normally asked. I also found then that there is already an option in the command file that depending on system features would magically read the phantom clock chip and provide the default for time and date.
After some reading it was evident, that this feature must
be related to the module code in the maintenance register
at address 17777750. I already had implemented this register
in the CPU board, but encoded the module as being a module
1 which is equivalent to a PDP-11/73A. I only added
this register so the
show configuration command of RT-11
would no longer display
PDP 11/73A Processor.
Then I gave it a try and changed the module code from
the module code for a KDJ11-E. At first it
PDP 11/94 Processor. This was due to the fact
that the CPLD on the CPU board that implements the
maintenance register is only connected to DAL0..8 of the DCJ11.
The other bits are read as
So I decided to make an additional engineering change to
the CPU board and added two wires from two spare pins of the
CPLD to DAL9 and DAL10. DAL9 is the UNIBUS system bit and DAL10
is reserved and should be read as
0 as well. Still not
100% correct as the remaining bits still not connected
to the CPLD (DAL11..15) still read as
There were only minimal changes required to the CPLD design file
PIN 94 = DAL9; PIN 96 = DAL10; . . DAL0 = BPOK; /* Normally pulled high via R22, but can be de-asserted via any bus device */ DAL1 = BOOT; /* We support two boot modes: ODT and BootROM @173000, the other options */ DAL2 = !BOOT; /* Power Fail Vector 24 and user defined bootROM address are not required */ DAL3 = 'b'0; /* HALT in Kernal Mode Enters ODT */ DAL4 = MAINT; /* Module code is 0101b therefore DAL4 should read 1b when reading MAINT */ DAL5 = 'b'0; DAL6 = MAINT; /* Module code is 0101b therefore DAL6 should read 1b when reading MAINT */ DAL7 = 'b'0; DAL8 = 'b'0; /* No FPA */ DAL9 = 'b'0; /* No UNIBUS */ DAL10 = 'b'0; [DAL10..0].oe = POWERUP & BUFCTL # MAINT & BUFCTL;
After that I could return to the default startup command file of my RSX-11MPlus build for the PDP-11/Hack and let the internal MCR command TIM deal with the RTC. Also I did a SYSGEN for RT-11 5.7
.boot dl: RT-11XM V05.07 .TYPE V5USER.TXT RT-11 V5.7 Installation of RT-11 Version 5.7 is complete and you are now running RT-11 from your system volume. Your system volume is your working volume if you have used the Automatic Installation (AI) procedure. If you have installed RT-11 using that procedure, Mentec recommends you verify the correct operation of your system's software using the VERIFY verification procedure. You can only perform VERIFY on the valid target (output) media you used for the AI procedure. Run VERIFY before you run CONFIG. To run VERIFY, enter the command: IND VERIFY Mentec recommends you read the file V5NOTE.TXT, which you can TYPE or PRINT. Also, read the Introduction to RT-11, rewritten for V5.7, which contains much of the information you need to use RT-11 Version 5.7. .R MSCPCK .date 1-Jan-2020 .time 10:27:36 .show config RT-11XM V05.07 Booted from DL0:RT11XM 22 bit addressing is on USR is set NOSWAP EXIT is set SWAP KMON is set NOIND RUN is set NOVBGEXE MODE is set NOSJ TT is set NOQUIET ERROR is set ERROR SL is set OFF EDIT is set KEX FORTRAN is set FORTRA KMON nesting depth is 3 CLI is set DCL, CCL, UCL, NO UCF PDP 11/93 Processor 1024KB of memory Floating Point Microcode Extended Instruction Set (EIS) Memory Management Unit 60 Hertz System Clock Device I/O time-out support System job support FPU support .
Now RT-11 automatically has the correct date and time when booted.