General Setup

The circuit in fact is quite simple, in the following I will describe the diagram and go into details of the individual components.

DCJ11 - Basic setup

The DCJ11 is a complex and capable 16-bit processor. It has many features and options. But most of them are not required for a PDP-11/Hack. Therefore many inputs are connected to VCC or GND, most of them using a pull-down or pull-up resistor. The values have been chosen to allow overriding the resistor with normal TTL outputs so you can gradually add your own circuits to add features using the expansion slot. Pull-up/down used are

• 3k3 pull-up/down resistors R1, R2, R4-R13, R16, R18, R19

DCJ11 - Clock

The DCJ11 has a built in crystal oscillator and requires only a crystal, two load capacitors and a bias resistor. The values required for the DCJ11 are

• Y1, any base crystal with any frequency from 4MHz up to 25MHz, YMMV
• R3, a bias resistor with the recommended value of 1MΩ
• C2, C24, two load capacitors with 68pF

I have used crystals will frequencies as low as 4MHz and as high as 22MHz successfully.

DCJ11 - Reset

The DCJ11 requires a decent reset signal. A single inverter from the hex inverter 74HCT14 U3 with schmitt trigger inputs is used to generate the INIT signal for the DCJ11. There is a tactile switch SW1 which allows you to reset the SBC whenever required, e.g. after sending the DCJ11 to Nirwana with a test programm.

At power-up C19 is discharged and the input of the inverter U3E is low which makes it output high. The output of the inverter U3E is connected to the input of inverter U3D and therefore the output of U3D is low. The output of U3D is connected to the INIT signal of the DCJ11 and resets the processor. The DCJ11 expects a reset signal which lasts for at least 25 clock cycles. The time constant of the RC at the input of U3E is approx 100ms therefore after 100ms the input of U3E reaches the upper threshold and hence its output will go low and therefore the reset input of DCJ11 will be de-asserted as well. 100ms is well above the required 25 clock cycles, regardless of the frequency you use.

The tactile switch discharges C19. To protect the switch and limit the inrush current a small 47Ω resistor is used to shorten the capacitor.

Note that the output of the first inverter U3E is used as positive INIT pulse as required by the DC319 or the CDP6402 when using the CDP6402 mini adapter.

I use inverter with schmitt trigger inputs to avoid any bouncing of the reset signal during the charging or discharging of C19 due to switch bouncing or noise.

DCJ11 - Socket

There is no 60-pin socket with 1.7" spacing. As on the CPU boards from digital you need to use 60 individual pins or two single in-line pin stripes. Make sure you get a decent quality as the pins should fit tightly and you may want to insert and remove the DCJ11 several times. Cheap pins tend to wear out after only 5 insertion and removal cycles. I got mine from mouser.

Signal Demultiplexing

You need to de-multiplex the following signals

• AIO0..3
• BS0..1
• DAL0..21

using ALE. The signals must be latched with the falling edge. Most latches however require a leading edge, therefore another inverter U3F of the 74HCT14 is used to invert ALE. Three 74HCT574 latches, U11, U12and U15, are used to latch these signal except for DAL18..21.

Note you need to use edge triggered latches as ALE will not stay asserted throughout the complete CPU cycle which would change the latches in case you use transparent latches, and this would change decoding of select signals that rely on the latched values.

The latched values of DAL0..21 contain the memory or IO address, the latched value of AIO0..3 define the type of the current CPU cycle and BS0..1 select the four possible banks.

Memory

The SBC uses byte-wide CMOS memory in a standard JEDEC 32-pin package. There are many vendors and you can use any brand, .e.g HM628128, AS6C1008, etc. Depending on the crystal you need to select the access time. 85ns access time is sufficient for a 18MHz clock. The memory consists of U16 and U17.

DC319 - UART

Per default the DCJ11 SBC requires a DC319 as UART U2. The DC319 requires an external clock of 614.4kHz, Y3. They are no longer produced but still available as NOS items. The DC319 needs as well an initialization signal, but in contrast to the DCJ11 it requires a positive pulse at the INIT and TEST inputs.

Glue Logic using TTL devices

The necessary decoding can be done using six TTL logic devices. I recommend to use high-speed CMOS devices of the HCT or ACT or AHCT series (note the T for TTL compatibility)

• U4 74HCT00 Quad 2-input NAND gate
• U7 74HCT02 Quad 2-input NOR gate
• U8 74HCT138 3-to-8 decoder
• U10 74HCT04 Hex inverter
• U13 74HCT153, Dual 4-to-1 multiplexor
• U14 74HCT139 Dual 2-to-4 decoder

You should use sockets for these devices as future expansion will take care of the decoding to implement enhanced features.

The glue logic does not decode any address lines, it completely relies on the AIO and BS signals. This is valid for a PDP-11/Hack. If you want to add more IO devices or in case your memory has multiple memory banks or in case you need to detect non existant IO or memory addresses you would have to fully decode the address lines.

The glue logic, in contrast to most PDP-11/Hack, decodes byte writes and therefore allows to run almost all type of small test programs.

Glue Logic using a GAL16V8

The glue logic is in fact very simple and only requires very few signals, a single GAL16V8 is sufficient. The PCB provides the option to install the GAL18V8 U18.

Again a socket is required as you may need to remove the GAL when using the expansion slot. The GAL and the TTL are mutually exclusive.

Expansion Slot

The DCJ11 SBC comes with an expansion slot which carries all important signals. The expansion slot is mainly directed to IO. There is no DMA support as only DAL0..15 or brought to the expansion slot.

Power-Up Configuration

There is an octal tri-state buffer U5, a 74HCT541, that is used to source the power-up configuration bits. The following configuration bits are mandatory for the DCJ11 as they are used by the microcode during initialization of the processor. Failing to provide a proper power-up configuration will result in erratic power-up behaviour or a stalled processor which waits for the power ok signal.

Jumpers

There are are various jumpers. Jumpers JP1 and JP2 need to be configured. These solder jumpers define the power-up behaviour via power-up configuration bits 1 and 2.

To make sure the DCJ11 enteres ODT at power-up JP1 must be soldered to connect the signal to VCC and JP2 to connect the signal to GND

Jumper JP3 is used to power the DCJ11 SBC with the USB to Serial/TTL adapter, if you have an external power-supply this jumper needs to be left option. Optionally you can solder a zero Ω resistor at position R17 or a dual pin-header and jumper.

JP4, JP5, JP6 are closed by default and need to be opened only for future projects.

Decoupling Capacitors

The circuit also has a bunch of decoupling capacitors. Their value is not important

• C3-C18, C25-C27 can have any value between 22nF and 150nF, use SMD capacitors with low ESR
• C20-C23 are tantalum capacitors with approx 47µF